DisplayPort 1.4 DSC (Display Stream Compression) is not working on Big Sur

Originator:tanmay.sonawane
Number:rdar://FB8924921 Date Originated:02/12/2020
Status:Open Resolved:
Product:macOS Product Version:macOS 11.0.1
Classification:Bug Reproducible:Always
 
On connecting a 4k 144hz monitor, macOS caps the refresh rate to 60hz with HDR and 95hz without HDR. This is an indication that DSC is not working correctly. 

On Catalina, macOS shows 144hz refresh rate correctly. 

Steps to reproduce:
1. Get a 4K 144hz monitor such as LG 27GN950 and a MBP 16" or eGPU enclosure with AMD 5500XT and newer GPU.
2. Connect the MBP or eGPU to the monitor either via TB to DisplayPort or directly DP to DP in case on eGPU.
3. Go to System Preferences > Displays > Option click "Scaled" > Tick Show low resolution modes.
4. Only 60hz and 90hz options will be available. 

Several people are facing this issue as well. Please check this reddit thread: https://www.reddit.com/r/mac/comments/jcjhpa/i_cant_use_display_stream_compression_in_mac_os/

Comments

Same issue

I have also submitted an issue using feedback assistant, will add the issue to openradar right now

By miha.mitic at Dec. 14, 2020, 11:03 p.m. (reply...)

Same issue here.

Pro Display XDR - Single DP 1.4 Cable plugged on AMD 5600xt - Worked fine at 6k pre Bigger with DSC. Broken after upgrading to BigSur reverts to 4k or 5k with no DSC.

Start: AGDC[6] 0x100000822

IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/GPP8@3,1/IOPP/pci-bridge@0/IOPP/pci-bridge@0/IOPP/GFX0@0/AMDRadeonX6000_AmdAgdcServices/AppleGraphicsDevicePolicy/AGDPClientControl Vendor: AMD [00001002]: DiscreteGPU 2 30000 FBs: 4, Ports: 0x1e mst:0xe ddc:0x1e aux:0xe, Streams: dp:6 dvi:4 mst:6 max:6 Framebuffers: * 0: Address: 1.0 Stream: Enabled Group: -1 Online Assoc'd MayGroup 1: Address: 0.0 Stream: Not Associated Group: -1 MayGroup 2: Address: 0.0 Stream: Not Associated Group: -1 MayGroup 3: Address: 0.0 Stream: Not Associated Group: -1 MayGroup Port Capabilities: 1: AUX, DDC, MST 2: AUX, DDC, MST 3: AUX, DDC, MST 4: DDC Connections: 1: [DP 1.4 4 x HBR2] Status: [4 x HBR2 7777] caps [features 0x101141b, p_encoding 0xd] Sink OUI:000-016-250 D1baba [068-049-098-097-098-097] HW Version: 17 FW Version: 6.56 2: 3: 4:

Register Dump Port 1 - Start

000000: 0x14 0x14 0xc4 0x83 0x01 0x00 0x01 0xc0 0x02 0x01 0x04 0x01 0x20 0x00 0x84 0x00 Reg: 000000: 14 : DPCD_REV: 1.4 Reg: 000001: 14 : MAX_LINK_RATE: HBR2 Reg: 000002: c4 : MAX_LANE_COUNT: 4, TPS3_SUPPORTED: 1, ENHANCED_FRAME_CAP: 1 Reg: 000003: 83 : MAX_DOWNSPREAD: 0.5% down, NO_AUX_HANDSHAKE_LINK_TRAINING: 0 Reg: 000004: 01 : NORP: 1 Reg: 000005: 00 : DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT: 0, DWN_STRM_PORT_TYPE: [0] DisplayPort, FORMAT_CONVERSION: 0, DETAILED_CAP_INFO_AVAILABLE: 0 Reg: 000006: 01 : MAIN_LINK_CHANNEL_CODING: ANSI 8B/10B Reg: 000007: c0 : DOWN_STREAM_PORT_COUNT: DWN_STRM_PORT_COUNT: 0, MSA_TIMING_PAR_IGNORED: 1, OUI: 1 Reg: 000008: 02 : RECEIVE_PORT0_CAP_0: LOCAL_EDID_PRESENT: 1, ASSOCIATED_TO_PRECEDING_PORT: 0 Reg: 000009: 01 : RECEIVE_PORT0_CAP_1: BUFFER_SIZE: 64 Reg: 00000a: 04 : RECEIVE_PORT1_CAP_0: Reg: 00000b: 01 : RECEIVE_PORT1_CAP_1: Reg: 00000c: 20 : I2C Speed: 1Mbps Reg: 00000d: 00 : eDP_CONFIGURATION_CAP: ALTERNATE_SCRAMBLER_RESET_CAPABLE: 0, FRAMING_CHANGE_CAPABLE: 0 Reg: 00000e: 84 : TRAINING_AUX_RD_INTERVAL: 0 RESERVED, EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT: YES Reg: 00000f: 00 : ADAPTER_CAP: FORCE_LOAD_SENSE_CAP: 0, ALTERNATE_I2C_PATTERN_CAP: 0 000020: 0x00 0x00 0x01 Reg: 000020: 00 : FAUX_CAP: FAUX_CAP: 0 Reg: 000021: 00 : MSTM_CAP: MST_CAP: 0 Reg: 000022: 01 : NUMBER_OF_AUDIO_ENDPOINTS: 1 000060: 0x01 0x21 0x00 0x0f 0x0b 0x04 0x00 0x00 0x00 0x01 0x0e 0x02 0x0c 0x00 0x00 0x00 Reg: 000060: 01 : DSC Support: 1 Reg: 000061: 21 : DSC Algorithm revision: 33 Reg: 000062: 00 : DSC RC Buffer Block size: 0 Reg: 000063: 0f : DSC RC Buffer size: 15 Reg: 000064: 0b : DSC slice Capabilities 1 : 11 Reg: 000065: 04 : DSC Line buffer bit depth: 4 Reg: 000066: 00 : DSC Block prediction support: 0 Reg: 000067: 00 : DSC Maximum bit per pixel: 0 Reg: 000068: 00 : DSC Maximum bit per pixel: 0 Reg: 000069: 01 : DSC Decoder color format capabilities: 1 Reg: 00006a: 0e : DSC decoder color depth capabilities: 14 Reg: 00006b: 02 : DSC Peak Throughput: 2 Reg: 00006c: 0c : DSC Maximum Slice width: 12 Reg: 00006d: 00 : DSC Slice capabilities 2: 0 Reg: 00006e: 00 : Reserved: 0 Reg: 00006f: 00 : DSC Bits per pixel increment: 0 000090: 0x0f Reg: 000090: 0f : FEC Capability: 0xf

000080: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 Reg: 000080: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000081: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000082: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000083: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000084: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000085: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000086: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000087: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000088: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 000089: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008a: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008b: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008c: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008d: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008e: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 Reg: 00008f: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0 000100: 0x14 0x84 Reg: 000100: 14 : LINK_BW_SET: HBR2 Reg: 000101: 84 : LANE_COUNT_SET: LANE_COUNT_SET 4, ENHANCED_FRAME_EN: 1 000107: 0x10 Reg: 000107: 10 : DOWNSPREAD_CTRL: SPREAD_AMP: 1, MSA_TIMING_PAR_IGNORE_EN: 0 00010a: 0x00 Reg: 00010a: 00 : eDP_CONFIGURATION_CAP_SET: ALTERNATE_SCRAMBLER_RESET_CAPABLE: 0, FRAMING_CHANGE_CAPABLE: 0 000111: 0x00 Reg: 000111: 00 : MSTM_CTRL: UPSTREAM_IS_SRC:0 UP_REQ_EN:0 MST_EN:0 000120: 0x00 Reg: 000120: 00 : FEC Configuration: 0x0 000160: 0x00 Reg: 000160: 00 : DSC Enable: 0x0


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